Umakant Kondapure, Collin Fernandes, Nipun Bhatia, Vikram Bathula and, Ketki Deshpande Solutions for Chapter: Semiconductors, Exercise 3: Competitive Thinking

Author:Umakant Kondapure, Collin Fernandes, Nipun Bhatia, Vikram Bathula & Ketki Deshpande

Umakant Kondapure Physics Solutions for Exercise - Umakant Kondapure, Collin Fernandes, Nipun Bhatia, Vikram Bathula and, Ketki Deshpande Solutions for Chapter: Semiconductors, Exercise 3: Competitive Thinking

Attempt the practice questions on Chapter 13: Semiconductors, Exercise 3: Competitive Thinking with hints and solutions to strengthen your understanding. MHT-CET TRIUMPH Physics Multiple Choice Questions Part - 2 Based on Std. XI & XII Syllabus of MHT-CET solutions are prepared by Experienced Embibe Experts.

Questions from Umakant Kondapure, Collin Fernandes, Nipun Bhatia, Vikram Bathula and, Ketki Deshpande Solutions for Chapter: Semiconductors, Exercise 3: Competitive Thinking with Hints & Solutions

EASY
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IMPORTANT

Carbon (C) and Silicon (Si) both have same lattice structures having 4 bonding electrons in each. However, C is insulator whereas Si is intrinsic semiconductor. This is because,

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In a zener diode, the reverse bias voltage is 3 V and the width of the depletion region is 300 Ao. The electric field intensity will be ___ V cm-1.

EASY
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IMPORTANT

A full wave rectifier circuit along with the input and output voltages is shown in the figure.

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The contribution to output voltage from diode 2 is,

MEDIUM
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IMPORTANT

A constant DC voltage is required from a variable AC voltage. Which of the following is correct order of operation?

MEDIUM
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IMPORTANT

An npn transistor is connected in common emitter configuration in a given amplifier. A load resistance of 800 Ω is connected in the collector circuit and the voltage drop across it is 0.8 V. If the current amplification factor is 0.96 and the input resistance of the circuit is 192 Ω, the voltage gain and the power gain of the amplifier will, respectively, be,

MEDIUM
MHT-CET
IMPORTANT

To get 1 as the output from the circuit shown in the figure, the input must be,

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IMPORTANT

The circuit diagram shows a logic combination with the states of outputs X, Y and Z given for inputs P, Q, R and S all at state 1. When inputs P and R change to state 0 with inputs Q and S still at 1, the states of outputs X, Y and Z change to,

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