HARD
HSSC Clerk
IMPORTANT
Earn 100
In an microprocessor, the instruction CMP B has been executed while the contents of the accumulator are less than that of register B, As a result _____.
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Important Questions on Computer Organization & Architecture
MEDIUM
HSSC Clerk
IMPORTANT
LRU is an effective cache replacement strategy primarily because programs _____.
MEDIUM
HSSC Clerk
IMPORTANT
Match List I with List II and select the correct answer from the codes given below the lists:
| List I | List II |
| A. A shift register can be used. | 1. for code conversion. |
| B. A multiplexer can be used. | 2. to generate a memory chip select. |
| C. A decoder can be used. | 3. for parallel to serial conversion. |
| 4. as many to one switch. | |
| 5. for analog to digital conversion. |
HARD
HSSC Clerk
IMPORTANT
When a subroutine is called, then address of the instruction following the CALL instruction is stored in the _____.
HARD
HSSC Clerk
IMPORTANT
The ability to temporarily halt the CPU and use this time to send information on buses is called _____.
HARD
HSSC Clerk
IMPORTANT
Pipelining improves CPU performance due to _____.
HARD
HSSC Clerk
IMPORTANT
If increasing the block size of a cache improves performance it is primarily because programs _____.
HARD
HSSC Clerk
IMPORTANT
Micro-instruction length is determined by _____.
1. The maximum number of simultaneous micro-operations that must be specified.
2. How the control information is represented or encoded.
3. How the next microinstruction address is specified.
HARD
HSSC Clerk
IMPORTANT
The following are the statements about Reduced Instruction Set Computer (RISC) architectures.
