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IMPORTANT
Earn 100

In which of the following instructions bus idle situation occurs? 

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Important Questions on Computer Organisation

HARD
LIC Assistant Mains
IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 105
If the cache needs an access time of 20 ns and the main memory 120 ns, then the average access time of a CPU is (assume bit-ratio is 80%) ____.
MEDIUM
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IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 106
The number of clock cycles necessary to complete 1 fetch cycle in 8085 (excluding wait state) is _____.
HARD
LIC Assistant Mains
IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 107
The possible number of Boolean functions of 3 variables X, Y, and Z such that, f(X, Y, Z) = f(X', Y', Z') is _____.
MEDIUM
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IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 108
The addressing mode used in the instruction PUSH B is _____.
MEDIUM
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IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 109
The difference between 80486 and 80386 is/are:
HARD
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IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 110
Which of the following interrupt are both level and edge-sensitive?
MEDIUM
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IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 111
Which of the following are typical characteristics of a RISC machine? 
HARD
LIC Assistant Mains
IMPORTANT
Objective Computer Awareness>Chapter 15 - Computer Organisation>Computer Organisation>Q 112
The working of a staircase switch is a typical example of the logical operation _____.