HARD
HSSC Clerk
IMPORTANT
Earn 100
The number of machine cycles required for RET instruction in microprocessors is _____.
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Important Questions on Computer Organization & Architecture
HARD
HSSC Clerk
IMPORTANT
In which addressing mode the contents of a register specified in the instruction are first decremented, and then these contents are used as the effective address of the operands.
MEDIUM
HSSC Clerk
IMPORTANT
Which is the most appropriate match for the items in the first column with the items in the second column?
X. Indirect Addressing.
Y. Indexed Addressing.
Z. Base Register Addressing.
I. Array implementation
II. Writing Relocatable code
III. Passing array as parameter
HARD
HSSC Clerk
IMPORTANT
In which addressing mode the effective address of the operand is the contents of a register specified in the instruction and after accessing the operand, the contents of this register is incremented to point to the next item in the list?
MEDIUM
HSSC Clerk
IMPORTANT
Two computers that communicate with each other use a simple parity check to detect errors for ASCII transmissions. Which of the following events will always lead to an undeleted error?
MEDIUM
HSSC Clerk
IMPORTANT
n this addressing mode, the operand is given explicitly in the instruction.
HARD
HSSC Clerk
IMPORTANT
The Register-to-Register (RS) _____.
HARD
HSSC Clerk
IMPORTANT
The register or main memory location which contains the effective address of the operand is known as _____.
HARD
HSSC Clerk
IMPORTANT
System programs such as compilers are designed so that they are _____.
